My Projects
Ultra-Wideband Remote Lock System
FPGA Image Processing
FPGA 2D Convolution
UART-AXI SoC with Cocotb Verification
RGB to Grayscale
Clock Domain Crossing FIFO
Memory Verification
FIFO Verification
Sequential Logic Verification
IoT Weather Station
Multiplier Design Verification
Digital Logic Verification
Temperature Compensated Ultrasonic Sensor
DSP Arithmetic Design
Delay Buffer Design
Synchronous FIFO Design
Optical Morse Code Communication System
FPGA Sinusoid Generator
Elastic Pipeline
Asynchronous Memory Design
LUT Logic Design
ESP32 Bluetooth Mouse
Konami Compass State Machines
Behavioral Verilog
ESP32 Humidity Temperature Sensor Display
Structural Verilog
RISC-V Embedded Sensor
FPGA Sorting Hardware Accelerator
PWM Controller PCB
Real Time System Monitor
RISC-V 5 Stage Pipelined Processor
Signal Processing Analysis
Sublet Housing Marketplace Web Platform
Breadboard Edge-Triggered D Flip-Flop
VGA Platformer Game Engine
Two-Player Sequential Circuit Quick Add Game
Finite State Machine Quick Add Game
16-Bit Loadable Counter
Verilog Sign Changer
FPGA Seven Segment Display Driver
Multi-Threaded HTTP Server
RC Filter Analysis and Bode Plot Characterization
Transient Response Analysis of RC & RL Circuits
Proving Thevenin, Norton, and Maximum Power Transfer Theorems
Proving Kirchhoff’s Voltage and Current Laws
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