Memory Verification

Description:

I developed testbenches to validate multiple RAM implementations, ensuring correct write-priority behavior in a 512-depth, 8-bit synchronous memory module. I created systematic read/write patterns to uncover faults such as inverted data paths, read-priority misbehavior, improper global reset handling, and asynchronous reset violations. Additionally, I interfaced with two AXI-Lite RAM modules to extract a hidden ASCII message by reading 32-bit words and parsing the embedded characters. After decoding the message, I performed targeted writes to correct the misspelled content, demonstrating full control of AXI-Lite transactions and memory-mapped communication. This part strengthened my ability to verify complex memory systems and debug obfuscated hardware designs.