Two-Player Sequential Circuit Quick Add Game

Description:

Designed and implemented a fully synchronous, two‐player “Quick Add” game on the BASYS3 FPGA platform using Verilog. This assignment extends the single‐player version by generating two independent 4-bit operands each round, computing their sum modulo 16, and displaying both the target and operands on four 7-segment digits. Players compete by pressing their respective buttons when the displayed sum matches the target; correct presses within a two-second window award a point, while incorrect presses deduct a point. Each player begins with three points (indicated by LED arrays), and the game ends when one player reaches six points or the opponent’s score falls to zero. The design employs one‐hot encoded state machines, positive‐edge triggered FDRE flip-flops, and only combinational logic via assign statements (using &, |, ˜, ˆ), ensuring strict adherence to synchronous design constraints. Additional features include optional sum display (controlled by switch sw[15]), forced operand values (sw[14]), real‐time button‐press indicators (LEDs), a four‐second flash sequence on match or mismatch, and a global reset that reinitializes all game state.